diff options
| author | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:25:03 -0600 |
|---|---|---|
| committer | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:25:03 -0600 |
| commit | 858dad7b65a6a17a9513b89f0c38cc31a5c6f374 (patch) | |
| tree | a5c2692bc6fd77fb5d60a1397ae34e810c8a6a8f | |
| parent | 7e1a2d1ce76600d707807545a3f8ed95c14a12ed (diff) | |
CR ENGR00048159 Add L2 flush for all mxc PF
Patch for CR ENGR00048159 Add L2 flush for all mxc PF.
This patch adds an outer cache flush_all function needed by the IPU
mxc_pf driver to synchronize WT cached buffers in the L2 cache.
Applies to linux 2.6.22 kernel on MX3 platforms.
http://www.bitshrine.org/gpp/linux-2.6.22-mx-CR-ENGR00048159-Add-L2-flush-for-all-mxc-P.patch
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 8 | ||||
| -rw-r--r-- | drivers/mxc/ipu/pf/mxc_pf.c | 2 | ||||
| -rw-r--r-- | include/asm-arm/cacheflush.h | 8 |
3 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 24d791ebf9c7..b074dbb75dc9 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -47,6 +47,13 @@ static inline void l2x0_inv_all(void) cache_sync(); } +static void l2x0_flush_all(void) +{ + /* clean and invalidate all ways */ + sync_writel(0xff, L2X0_CLEAN_INV_WAY, 0xff); + cache_sync(); +} + static void l2x0_inv_range(unsigned long start, unsigned long end) { unsigned long addr; @@ -109,6 +116,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) outer_cache.inv_range = l2x0_inv_range; outer_cache.clean_range = l2x0_clean_range; outer_cache.flush_range = l2x0_flush_range; + outer_cache.flush_all = l2x0_flush_all; printk(KERN_INFO "L2X0 cache controller enabled\n"); } diff --git a/drivers/mxc/ipu/pf/mxc_pf.c b/drivers/mxc/ipu/pf/mxc_pf.c index fe5057ed3d2b..317c613ba1ec 100644 --- a/drivers/mxc/ipu/pf/mxc_pf.c +++ b/drivers/mxc/ipu/pf/mxc_pf.c @@ -885,7 +885,7 @@ int mxc_pf_fsync(struct file *filp, struct dentry *dentry, int datasync) { if (pf_data.buffer_dirty) { flush_cache_all(); -// l2_flush_all(); + outer_flush_all(); } pf_data.buffer_dirty = false; diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index d1294a46c70c..528c72a10e87 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -202,6 +202,7 @@ struct outer_cache_fns { void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); void (*flush_range)(unsigned long, unsigned long); + void (*flush_all)(void); }; /* @@ -279,6 +280,11 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) if (outer_cache.flush_range) outer_cache.flush_range(start, end); } +static inline void outer_flush_all(void) +{ + if (outer_cache.flush_all) + outer_cache.flush_all(); +} #else @@ -288,6 +294,8 @@ static inline void outer_clean_range(unsigned long start, unsigned long end) { } static inline void outer_flush_range(unsigned long start, unsigned long end) { } +static inline void outer_flush_all(void) +{ } #endif |