diff options
Diffstat (limited to 'platform/drivers/inc/gpio_imx.h')
| -rw-r--r-- | platform/drivers/inc/gpio_imx.h | 130 |
1 files changed, 60 insertions, 70 deletions
diff --git a/platform/drivers/inc/gpio_imx.h b/platform/drivers/inc/gpio_imx.h index 1cf60e7..1af7ceb 100644 --- a/platform/drivers/inc/gpio_imx.h +++ b/platform/drivers/inc/gpio_imx.h @@ -45,34 +45,37 @@ * Definitions ******************************************************************************/ -/*! @brief GPIO direction definition */ -typedef enum _gpio_pin_direction { - gpioDigitalInput = 0U, /*!< Set current pin as digital input*/ - gpioDigitalOutput = 1U /*!< Set current pin as digital output*/ +/*! @brief GPIO direction definition. */ +typedef enum _gpio_pin_direction +{ + gpioDigitalInput = 0U, /*!< Set current pin as digital input.*/ + gpioDigitalOutput = 1U, /*!< Set current pin as digital output.*/ } gpio_pin_direction_t; -/*! @brief GPIO interrupt mode definition*/ -typedef enum _gpio_interrupt_mode { - gpioIntLowLevel = 0U, /*!< Set current pin interrupt is low-level sensitive.*/ - gpioIntHighLevel = 1U, /*!< Set current pin interrupt is high-level sensitive.*/ - gpioIntRisingEdge = 2U, /*!< Set current pin interrupt is rising-edge sensitive.*/ - gpioIntFallingEdge = 3U, /*!< Set current pin interrupt is falling-edge sensitive.*/ - gpioNoIntmode = 4U /*!< Set current pin general IO functionality. */ +/*! @brief GPIO interrupt mode definition. */ +typedef enum _gpio_interrupt_mode +{ + gpioIntLowLevel = 0U, /*!< Set current pin interrupt is low-level sensitive.*/ + gpioIntHighLevel = 1U, /*!< Set current pin interrupt is high-level sensitive.*/ + gpioIntRisingEdge = 2U, /*!< Set current pin interrupt is rising-edge sensitive.*/ + gpioIntFallingEdge = 3U, /*!< Set current pin interrupt is falling-edge sensitive.*/ + gpioNoIntmode = 4U, /*!< Set current pin general IO functionality. */ } gpio_interrupt_mode_t; -/*! @brief GPIO pin(bit) value definition */ -typedef enum _gpio_pin_action { - gpioPinClear = 0U, - gpioPinSet = 1U +/*! @brief GPIO pin(bit) value definition. */ +typedef enum _gpio_pin_action +{ + gpioPinClear = 0U, /*!< Clear GPIO Pin.*/ + gpioPinSet = 1U, /*!< Set GPIO Pin.*/ } gpio_pin_action_t; -/*! @brief GPIO Init structure definition */ -typedef struct GpioInit +/*! @brief GPIO Init structure definition. */ +typedef struct _gpio_init_config { - uint32_t pin; /*!< Specifies the pin number. */ - gpio_pin_direction_t direction; /*!< Specifies the pin direction. */ - gpio_interrupt_mode_t interruptMode; /*!< Specifies the pin interrupt mode, a value of @ref gpio_interrupt_mode_t. */ -} gpio_init_t; + uint32_t pin; /*!< Specifies the pin number. */ + gpio_pin_direction_t direction; /*!< Specifies the pin direction. */ + gpio_interrupt_mode_t interruptMode; /*!< Specifies the pin interrupt mode, a value of @ref gpio_interrupt_mode_t. */ +} gpio_init_config_t; /******************************************************************************* * API @@ -89,13 +92,13 @@ extern "C" { /*! * @brief Initializes the GPIO peripheral according to the specified - * parameters in the initStruct. + * parameters in the initConfig. * - * @param base GPIO base pointer (GPIO1, GPIO2, GPIO3, etc.). - * @param initStruct pointer to a gpio_init_t structure that - * contains the configuration information. + * @param base GPIO base pointer. + * @param initConfig pointer to a @ref gpio_init_config_t structure that + * contains the configuration information. */ -void GPIO_Init(GPIO_Type* base, gpio_init_t* initStruct); +void GPIO_Init(GPIO_Type* base, const gpio_init_config_t* initConfig); /*@}*/ @@ -104,18 +107,17 @@ void GPIO_Init(GPIO_Type* base, gpio_init_t* initStruct); * @{ */ - /*! +/*! * @brief Reads the current input value of the pin when pin's direction is configured as input. * - * @param base GPIO base pointer (GPIO1, GPIO2, GPIO3, etc.). + * @param base GPIO base pointer. * @param pin GPIO port pin number. * @return GPIO pin input value. - * - 0: Pin logic level is 0, or is not configured for use by digital function. - * - 1: Pin logic level is 1. */ static inline uint8_t GPIO_ReadPinInput(GPIO_Type* base, uint32_t pin) { assert(pin < 32); + return (uint8_t)((GPIO_DR_REG(base) >> pin) & 1U); } @@ -123,14 +125,10 @@ static inline uint8_t GPIO_ReadPinInput(GPIO_Type* base, uint32_t pin) * @brief Reads the current input value of a specific GPIO port when port's direction are all configured as input. * This function gets all 32-pin input as a 32-bit integer. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) - * @return GPIO port input data. Each bit represents one pin. For each bit: - * - 0: Pin logic level is 0, or is not configured for use by digital function. - * - 1: Pin logic level is 1. - * - LSB: pin 0 - * - MSB: pin 31 + * @param base GPIO base pointer. + * @return GPIO port input data. */ -static inline uint32_t GPIO_ReadPortInput(GPIO_Type *base) +static inline uint32_t GPIO_ReadPortInput(GPIO_Type* base) { return GPIO_DR_REG(base); } @@ -138,26 +136,23 @@ static inline uint32_t GPIO_ReadPortInput(GPIO_Type *base) /*! * @brief Reads the current pin output. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) + * @param base GPIO base pointer. * @param pin GPIO port pin number. - * @return current pin output value, 0 - Low logic, 1 - High logic. + * @return Current pin output value. */ static inline uint8_t GPIO_ReadPinOutput(GPIO_Type* base, uint32_t pin) { assert(pin < 32); + return (uint8_t)((GPIO_DR_REG(base) >> pin) & 0x1U); } /*! * @brief Reads out all pin output status of the current port. - * This function operates all 32 port pins. + * This function operates all 32 port pins. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) - * @return current port output status. Each bit represents one pin. For each bit: - * - 0: corresponding pin is outputting logic level 0 - * - 1: corresponding pin is outputting logic level 1 - * - LSB: pin 0 - * - MSB: pin 31 + * @param base GPIO base pointer. + * @return Current port output status. */ static inline uint32_t GPIO_ReadPortOutput(GPIO_Type* base) { @@ -167,11 +162,9 @@ static inline uint32_t GPIO_ReadPortOutput(GPIO_Type* base) /*! * @brief Sets the output level of the individual GPIO pin to logic 1 or 0. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) + * @param base GPIO base pointer. * @param pin GPIO port pin number. - * @param pinVal pin output value, one of the follow. - * -gpioPinClear: logic 0; - * -gpioPinSet: logic 1. + * @param pinVal pin output value (See @ref gpio_pin_action_t structure). */ void GPIO_WritePinOutput(GPIO_Type* base, uint32_t pin, gpio_pin_action_t pinVal); @@ -179,12 +172,8 @@ void GPIO_WritePinOutput(GPIO_Type* base, uint32_t pin, gpio_pin_action_t pinVal * @brief Sets the output of the GPIO port pins to a specific logic value. * This function operates all 32 port pins. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) - * @param portVal data to configure the GPIO output. Each bit represents one pin. For each bit: - * - 0: set logic level 0 to pin - * - 1: set logic level 1 to pin - * - LSB: pin 0 - * - MSB: pin 31 + * @param base GPIO base pointer. + * @param portVal data to configure the GPIO output. */ static inline void GPIO_WritePortOutput(GPIO_Type* base, uint32_t portVal) { @@ -201,15 +190,14 @@ static inline void GPIO_WritePortOutput(GPIO_Type* base, uint32_t portVal) /*! * @brief Reads the current GPIO pin pad status. * - * @param base GPIO base pointer (GPIO1, GPIO2, GPIO3, etc.). + * @param base GPIO base pointer. * @param pin GPIO port pin number. * @return GPIO pin pad status value. - * - 0: Pin pad status logic level is 0. - * - 1: Pin pad status logic level is 1. */ static inline uint8_t GPIO_ReadPadStatus(GPIO_Type* base, uint32_t pin) { assert(pin < 32); + return (uint8_t)((GPIO_PSR_REG(base) >> pin) & 1U); } @@ -221,26 +209,27 @@ static inline uint8_t GPIO_ReadPadStatus(GPIO_Type* base, uint32_t pin) */ /*! - * @brief Disable or enable the specific pin interrupt. + * @brief Enable or Disable the specific pin interrupt. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.). + * @param base GPIO base pointer. * @param pin GPIO pin number. - * @param enable enable or disable interrupt. + * @param enable Enable or disable interrupt. + * - true: Enable GPIO interrupt. + * - false: Disable GPIO interrupt. */ void GPIO_SetPinIntMode(GPIO_Type* base, uint32_t pin, bool enable); /*! * @brief Check individual pin interrupt status. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) + * @param base GPIO base pointer. * @param pin GPIO port pin number. * @return current pin interrupt status flag. - * - 0: interrupt is not detected. - * - 1: interrupt is detected. */ static inline bool GPIO_IsIntPending(GPIO_Type* base, uint32_t pin) { assert(pin < 32); + return (bool)((GPIO_ISR_REG(base) >> pin) & 1U); } @@ -248,22 +237,23 @@ static inline bool GPIO_IsIntPending(GPIO_Type* base, uint32_t pin) * @brief Clear pin interrupt flag. Status flags are cleared by * writing a 1 to the corresponding bit position. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.) + * @param base GPIO base pointer. * @param pin GPIO port pin number. */ static inline void GPIO_ClearStatusFlag(GPIO_Type* base, uint32_t pin) { assert(pin < 32); - GPIO_ISR_REG(base) |= (1U << pin); + + GPIO_ISR_REG(base) = (1U << pin); } /*! - * @brief Disable or enable the edge select bit to override + * @brief Enable or disable the edge select bit to override * the ICR register's configuration. * - * @param base GPIO base pointer(GPIO1, GPIO2, GPIO3, etc.). + * @param base GPIO base pointer. * @param pin GPIO port pin number. - * @param enable enable or disable. + * @param enable Enable or disable edge select bit. */ void GPIO_SetIntEdgeSelect(GPIO_Type* base, uint32_t pin, bool enable); |