verdin-am62: Add mallow lvds overlay

Add overlay for lvds display for mallow v1.1 using native lvds interface
of verdin am62.

Related-to: ELB-5218

Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>

2 files changed, 132 insertions, 0 deletions

diff --git a/overlays/Makefile b/overlays/Makefile
index e2b9dbd..148b6f8 100644
--- a/overlays/Makefile
+++ b/overlays/Makefile
@@ -57,6 +57,7 @@ dtb-y += verdin-am62_mezzanine_panel-lvds-dual-channel-1080p_overlay.dtbo
 dtb-y += verdin-am62_nau8822-btl_overlay.dtbo
 dtb-y += verdin-am62_ov5640_overlay.dtbo
 dtb-y += verdin-am62_panel-cap-touch-10inch-dsi_overlay.dtbo
+dtb-y += verdin-am62_panel-cap-touch-10inch-lvds_overlay.dtbo
 dtb-y += verdin-am62_spidev_overlay.dtbo
 dtb-y += verdin-imx8mm_nau8822-btl_overlay.dtbo
 dtb-y += verdin-imx8mm_spidev_overlay.dtbo
diff --git a/overlays/verdin-am62_panel-cap-touch-10inch-lvds_overlay.dts b/overlays/verdin-am62_panel-cap-touch-10inch-lvds_overlay.dts
new file mode 100644
index 0000000..8dd3cc0
--- /dev/null
+++ b/overlays/verdin-am62_panel-cap-touch-10inch-lvds_overlay.dts
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2023 Toradex
+ */
+
+// Verdin AM62 single-channel LVDS
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "k3-pinctrl.h"
+
+/ {
+	compatible = "toradex,verdin-am62";
+};
+
+&{/} {	
+	
+	backlight_lvds_native: backlight-lvds-native {
+		compatible = "pwm-backlight";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>;		
+		brightness-levels = <0 45 63 88 119 158 203 255>;
+		default-brightness-level = <4>;
+		/* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */
+		enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>;
+		/* Verdin PWM_2 (SODIMM 16) */
+		pwms = <&epwm0 1 6666667 PWM_POLARITY_INVERTED>;
+	};
+
+	panel-lvds-native {
+		compatible = "panel-lvds";
+		backlight = <&backlight_lvds_native>;
+		data-mapping = "vesa-24";
+		height-mm = <136>;
+		width-mm = <217>;
+
+		panel-timing {
+			clock-frequency = <68900000 71100000 73400000>;
+			de-active = <1>;
+			hactive = <1280 1280 1280>;
+			hback-porch = <23 60 71>;
+			hfront-porch = <23 60 71>;
+			hsync-active = <0>;
+			hsync-len = <15 40 47>;
+			pixelclk-active = <1>; /* positive edge */
+			vactive = <800 800 800>;
+			vback-porch = <5 7 10>;
+			vfront-porch = <5 7 10>;
+			vsync-active = <0>;
+			vsync-len = <6 9 12>;
+		};
+
+		port {
+			panel_lvds_native_in: endpoint {
+				remote-endpoint = <&oldi_out0>;
+			};
+		};
+	};
+};
+
+&main_pmx0 {
+	/* Mallow Touch RST */
+	pinctrl_i2s_2_d_in_gpio: main-gpio0-33-default-pins {
+		pinctrl-single,pins = <
+			AM62X_IOPAD(0x0088, PIN_INPUT, 7) /* (L24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */
+		>;
+	};
+
+	/* Mallow Touch INT#*/
+	pinctrl_i2s_2_sync_gpio: main-gpio0-37-default-pins {
+		pinctrl-single,pins = <
+			AM62X_IOPAD(0x0098, PIN_INPUT,  7) /* (U23) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */
+		>;
+	};
+};
+
+&dss {
+	status = "okay";
+};
+
+/*
+ * If the bridge is missing setting up dss will fail. As this bridge
+ * isn't available on all SKU disable it here.
+ * Thus having an overlay for the DSI output enabled concurrently
+ * with this one will not work.
+ */
+&dsi_bridge {
+	status = "disabled";
+};
+
+&dss_ports {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/* VP1: LVDS Output (OLDI TX 0) */
+	port@0 {
+		reg = <0>;
+
+		oldi_out0: endpoint {
+			remote-endpoint = <&panel_lvds_native_in>;
+		};
+	};
+};
+
+/* Verdin PWM_1, PWM_2 */
+&epwm0 {
+	status = "okay";
+};
+
+/* Verdin I2C_2_DSI */
+&main_i2c2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	touch@4a {
+		compatible = "atmel,maxtouch";
+		reg = <0x4a>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2s_2_d_in_gpio>, <&pinctrl_i2s_2_sync_gpio>;
+		/* Verdin I2S_2_SYNC as GPIO (SODIMM 44) */
+		interrupt-parent = <&main_gpio0>;
+		interrupts = <37 IRQ_TYPE_EDGE_FALLING>;
+		/* Verdin I2S_2_D_IN as GPIO(SODIMM 48) */
+		reset-gpios = <&main_gpio0 33 GPIO_ACTIVE_LOW>;
+	};
+};